π160E- in more detail

The coming explanation will help you understand how to interface and use the π160E (or its variants π161E, π162E, π163E, etc.) in real circuits like MCU-to-MCU isolation, gate-driver communication, or SMPS feedback applications.

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1. Device Overview

The π160E is a multi-channel digital isolator based on iDivider® capacitive isolation technology.
It transfers digital signals across an isolation barrier using high-frequency modulated signals and internal decoding, offering galvanic isolation up to 3 kVrms or 5 kVrms between two sides:

• VDD1–GND1 side → “Logic-Side A” (often MCU or controller domain)
• VDD2–GND2 side → “Isolated-Side B” (often high-voltage, power, or motor domain)

Each side has its own power supply and ground reference.

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2. Typical Pinout (16-pin SOIC)

A standard π160E / π161E / π162E / π163E device comes in a 16-pin SOIC package, with up to 6 channels (depending on the version).
Below is a generic pin description — exact pin function may differ slightly between versions (e.g., input/output direction per channel).

Pin No.	Pin Name	Type	Description
1	VDD1	Power	Supply voltage for the logic-side A (usually 3.3 V or 5 V).
2	GND1	Ground	Ground reference for logic-side A (MCU domain).
3–8	INx / OUTx	Digital I/O	Isolated data channels. Direction (input or output) depends on the device variant (e.g., π160E has 3 channels in each direction).
9	GND2	Ground	Ground reference for isolated-side B (power domain).
10	VDD2	Power	Supply voltage for the isolated-side B (3.3 V or 5 V).
11–16	INx / OUTx	Digital I/O	Remaining isolated data channels.

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3. Power Supply Pins

⚡ VDD1 and VDD2

• Each side must be powered independently (e.g., VDD1 = 3.3 V, VDD2 = 5 V).
• This allows the π160E to also act as a logic-level translator.
• Both supplies must be decoupled with 0.1 µF + 1 µF ceramic capacitors close to the pins.

Note: The isolator will not function unless both VDD1 and VDD2 are powered. Some versions offer failsafe output states when one side loses power.

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4. Ground Pins

⚙️ GND1 and GND2

• Provide return paths for each side’s logic and power signals.
• Never connect GND1 and GND2 directly — that defeats the purpose of isolation.
• Use separate ground planes for logic and power domains, connected only via the isolator barrier internally.

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5. Data Channel Pins

Each isolator channel pair transfers one digital signal across the barrier.
For example, in π160E36, there are 6 channels total – 3 forward and 3 reverse.

Let’s define the function groups:

Channel	Input (Side A)	Output (Side B)	Function
A1 → B1	IN1 (VDD1 domain)	OUT1 (VDD2 domain)	Forward channel 1
A2 → B2	IN2	OUT2	Forward channel 2
A3 → B3	IN3	OUT3	Forward channel 3
B4 → A4	IN4 (VDD2 domain)	OUT4 (VDD1 domain)	Reverse channel 1
B5 → A5	IN5	OUT5	Reverse channel 2
B6 → A6	IN6	OUT6	Reverse channel 3

This configuration allows bidirectional data flow across the isolation barrier (like UART TX/RX, enable signals, fault feedback, etc.).

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6. Internal Structure (Simplified Concept)

Each data channel contains:

• A modulator (transmits data as high-frequency pulse streams)
• A capacitive isolation barrier (transfers energy without electrical contact)
• A demodulator (reconstructs the logic signal on the other side)

This ensures no DC path between sides → high voltage isolation.

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7. Application Examples

A. Isolated MCU Communication

Use π160E between a low-voltage microcontroller and a high-voltage subsystem:

• Side A (3.3 V): MCU I/O pins
• Side B (5 V): Power driver logic (like gate driver or feedback circuit)

Typical connections:

• MCU_TX → IN1 → OUT1 → Gate driver input
• Fault feedback → IN4 → OUT4 → MCU_GPIO

This setup ensures safe signal transfer with complete galvanic isolation.

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⚡ B. Isolated Power Supply Feedback

In SMPS or flyback converters:

• Primary side: Controller (PWM or MCU)
• Secondary side: Voltage feedback or optocoupler-replacement signal

Here, π160E can replace traditional optocouplers for high-speed feedback:

• Low delay (~9 ns)
• No CTR degradation
• Stable operation over temperature

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⚙️ C. Motor Control & Industrial Automation

• Isolation between MCU and IGBT/MOSFET gate driver ICs
• Isolation between current/voltage sensors and control logic
• Robust operation under high-noise environments (CMTI > 75 kV/µs)

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8. Design Tips

• Always place decoupling capacitors (0.1 µF + 1 µF) on each VDD–GND pair.
• Avoid long traces on isolated lines to minimize EMI coupling.
• Follow PCB creepage & clearance rules for isolation voltage (≥ 3 mm for 3 kV, ≥ 5 mm for 5 kV).
• Use ground planes on both sides, but no copper under the isolation barrier.

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9. Key Advantages Over Optocouplers

Feature	π160E Digital Isolator	Optocoupler
Speed	Up to 200 Mbps	Typically < 1 Mbps
Delay	~9 ns	~100 ns – 1 µs
Power Consumption	Low	Moderate to high
Lifetime Drift	Stable	Degrades with LED aging
CMTI	75–120 kV/µs	Typically < 15 kV/µs
Logic Compatibility	3.3 V ↔ 5 V	5 V only

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10. Summary Table

Parameter	Description
Isolation	3 kVrms or 5 kVrms
Data Rate	Up to 200 Mbps
Propagation Delay	~9 ns typical
CMTI	75 – 120 kV/µs
Logic Levels	3.3 V / 5 V
Supply Voltage	3.0 V – 5.5 V per side
Package	SOIC-16
Temperature	-40 °C – +125 °C

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